On Mon, Apr 26, 2021 at 11:06:51AM +0200, Krzysztof Kozlowski wrote: > On 20/04/2021 18:52, Thierry Reding wrote: > > From: Thierry Reding <treding@xxxxxxxxxx> > > > > Hi, > > > > this set of patches converges the feature sets of the pre-Tegra186 and > > the post-Tegra186 memory controller drivers such that newer chips can > > take advantage of some features that were previously only implemented > > on earlier chips. > > > > Note that this looks a bit daunting from a diffstat point of view but > > the bulk of this is in the first two patches that basically shuffle > > around where some of the per-memory-client register definitions are > > located, hence the big number of changed lines. > > > > I haven't done any exhaustive testing on the series yet, but wanted to > > get some feedback on the general idea. I'll queue up this up for our > > automated testing in the coming days. > > > > Thierry > > > > Thierry Reding (10): > > memory: tegra: Consolidate register fields > > memory: tegra: Unify struct tegra_mc across SoC generations > > memory: tegra: Push suspend/resume into SoC drivers > > memory: tegra: Make per-SoC setup more generic > > memory: tegra: Extract setup code into callback > > memory: tegra: Parameterize interrupt handler > > memory: tegra: Only initialize reset controller if available > > memory: tegra: Unify drivers > > memory: tegra: Add memory client IDs to tables > > memory: tegra: Split Tegra194 data into separate file > > I didn't get patch 10/10. Neither did lore. I suspect that I typed one too many zeros before the wildcard and therefore the glob didn't pick up that last patch. I'll make sure to include it in v2. Thierry
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