On Tue, 23 Mar 2021 17:28:09 -0700, Rich Wiley wrote:
> On NVIDIA Carmel cores, CNP behaves differently than it does on standard
> ARM cores. On Carmel, if two cores have CNP enabled and share an L2 TLB
> entry created by core0 for a specific ASID, a non-shareable TLBI from
> core1 may still see the shared entry. On standard ARM cores, that TLBI
> will invalidate the shared entry as well.
>
> This causes issues with patchsets that attempt to do local TLBIs based
> on cpumasks instead of broadcast TLBIs. Avoid these issues by disabling
> CNP support for NVIDIA Carmel cores.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: kernel: disable CNP on Carmel
https://git.kernel.org/arm64/c/20109a859a9b
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
