Thanks Marc for the patch. > Subject: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the > MSI capture address > > A long cargo-culted behaviour of PCI drivers is to allocate memory to obtain > an address that is fed to the controller as the MSI capture address (i.e. the > MSI doorbell). > > But there is no actual requirement for this address to be RAM. > All it needs to be is a suitable aligned address that will > *not* be DMA'd to. > > Use the physical address of the 'port' data structure as the MSI capture > address. > > Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> > --- > drivers/pci/controller/pcie-xilinx.c | 18 ++++++------------ > 1 file changed, 6 insertions(+), 12 deletions(-) ... > - msg.address_hi = 0; > - msg.address_lo = msg_addr; > + msg.address_hi = upper_32_bits(msg_addr); > + msg.address_lo = lower_32_bits(msg_addr); The XILINX_PCIE_REG_MSIBASE2 register expects 4KB aligned address. The lower 12-bits are always set to 0 in this register. So we need to mask the address while programming address to EP. #define XILINX_PCIE_MSI_ADDR_MASK GENMASK(31, 12) msg.address_lo = lower_32_bits(msg_addr) & XILINX_PCIE_MSI_ADDR_MASK; > msg.data = irq; > Regards, Bharat
