Tegra XHCI controler can be placed in ELPG (Engine Level PowerGated) state for power saving when all of the connected USB devices are in suspended state. This patch series includes clk, phy and pmc changes that are required for properly place controller in ELPG and bring controller out of ELPG. JC Kuo (15): clk: tegra: Add PLLE HW power sequencer control clk: tegra: Don't enable PLLE HW sequencer at init phy: tegra: xusb: Move usb3 port init for Tegra210 phy: tegra: xusb: tegra210: Do not reset UPHY PLL phy: tegra: xusb: Rearrange UPHY init on Tegra210 phy: tegra: xusb: Add Tegra210 lane_iddq operation phy: tegra: xusb: Add sleepwalk and suspend/resume soc/tegra: pmc: Provide USB sleepwalk register map arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop phy: tegra: xusb: Add wake/sleepwalk for Tegra210 phy: tegra: xusb: Tegra210 host mode VBUS control phy: tegra: xusb: Add wake/sleepwalk for Tegra186 usb: host: xhci-tegra: Unlink power domain devices xhci: tegra: Enable ELPG for runtime/system PM .../phy/nvidia,tegra124-xusb-padctl.txt | 1 + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + drivers/clk/tegra/clk-pll.c | 12 - drivers/clk/tegra/clk-tegra210.c | 53 +- drivers/phy/tegra/xusb-tegra186.c | 558 ++++- drivers/phy/tegra/xusb-tegra210.c | 1889 +++++++++++++---- drivers/phy/tegra/xusb.c | 92 +- drivers/phy/tegra/xusb.h | 22 +- drivers/soc/tegra/pmc.c | 94 + drivers/usb/host/xhci-tegra.c | 613 ++++-- include/linux/clk/tegra.h | 4 +- include/linux/phy/tegra/xusb.h | 10 +- 12 files changed, 2784 insertions(+), 565 deletions(-) v5 "arm64: tegra210/tegra186/tegra194: XUSB PADCTL irq" has been merged separately. -- 2.25.1
