On Tue, Jan 12, 2021 at 03:27:20PM +0300, Dmitry Osipenko wrote:
> The 600MHz is a too high clock rate for some SoC versions for the video
> decoder hardware and this may cause stability issues. Use 300MHz for the
> video decoder by default, which is supported by all hardware versions.
>
> Fixes: ed1a2459e20c ("clk: tegra: Add Tegra20/30 EMC clock implementation")
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> ---
> drivers/clk/tegra/clk-tegra30.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Thierry Reding <treding@xxxxxxxxxx>
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