Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees with optional EMC core supply and remove
unsupported OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
---
.../tegra30-asus-nexus7-grouper-common.dtsi | 4 +
...30-asus-nexus7-grouper-memory-timings.dtsi | 12 +
.../arm/boot/dts/tegra30-peripherals-opp.dtsi | 383 ++++++++++++++++++
arch/arm/boot/dts/tegra30.dtsi | 6 +
4 files changed, 405 insertions(+)
create mode 100644 arch/arm/boot/dts/tegra30-peripherals-opp.dtsi
diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
index 88ca03f57b3b..261e266c61d8 100644
--- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
+++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
@@ -956,6 +956,10 @@ pmc@7000e400 {
nvidia,sys-clock-req-active-high;
};
+ memory-controller@7000f400 {
+ core-supply = <&vdd_core>;
+ };
+
ahub@70080000 {
i2s@70080400 {
status = "okay";
diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-memory-timings.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-memory-timings.dtsi
index bc0f6f29b956..bcff0997ee51 100644
--- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-memory-timings.dtsi
+++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-memory-timings.dtsi
@@ -1563,3 +1563,15 @@ timing-667000000 {
};
};
};
+
+&emc_icc_dvfs_opp_table {
+ /delete-node/ opp@750000000,1300;
+ /delete-node/ opp@800000000,1300;
+ /delete-node/ opp@900000000,1350;
+};
+
+&emc_bw_dfs_opp_table {
+ /delete-node/ opp@750000000;
+ /delete-node/ opp@800000000;
+ /delete-node/ opp@900000000;
+};
diff --git a/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi
new file mode 100644
index 000000000000..cbe84d25e726
--- /dev/null
+++ b/arch/arm/boot/dts/tegra30-peripherals-opp.dtsi
@@ -0,0 +1,383 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
+ compatible = "operating-points-v2";
+
+ opp@12750000,950 {
+ opp-microvolt = <950000 950000 1350000>;
+ opp-hz = /bits/ 64 <12750000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@12750000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <12750000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@12750000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <12750000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@25500000,950 {
+ opp-microvolt = <950000 950000 1350000>;
+ opp-hz = /bits/ 64 <25500000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@25500000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <25500000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@25500000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <25500000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@27000000,950 {
+ opp-microvolt = <950000 950000 1350000>;
+ opp-hz = /bits/ 64 <27000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@27000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <27000000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@27000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <27000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@51000000,950 {
+ opp-microvolt = <950000 950000 1350000>;
+ opp-hz = /bits/ 64 <51000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@51000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <51000000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@51000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <51000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@54000000,950 {
+ opp-microvolt = <950000 950000 1350000>;
+ opp-hz = /bits/ 64 <54000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@54000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <54000000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@54000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <54000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@102000000,950 {
+ opp-microvolt = <950000 950000 1350000>;
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@102000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@102000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@108000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <108000000>;
+ opp-supported-hw = <0x0007>;
+ };
+
+ opp@108000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <108000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@204000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x0007>;
+ };
+
+ opp@204000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@333500000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <333500000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@333500000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <333500000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@333500000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <333500000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@375000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <375000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@375000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <375000000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@375000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <375000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@400000000,1000 {
+ opp-microvolt = <1000000 1000000 1350000>;
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@400000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0x0001>;
+ };
+
+ opp@400000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@416000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <416000000>;
+ opp-supported-hw = <0x0007>;
+ };
+
+ opp@416000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <416000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@450000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <450000000>;
+ opp-supported-hw = <0x0007>;
+ };
+
+ opp@450000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <450000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@533000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <533000000>;
+ opp-supported-hw = <0x0007>;
+ };
+
+ opp@533000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <533000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@625000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <625000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@625000000,1250 {
+ opp-microvolt = <1250000 1250000 1350000>;
+ opp-hz = /bits/ 64 <625000000>;
+ opp-supported-hw = <0x0008>;
+ };
+
+ opp@667000000,1200 {
+ opp-microvolt = <1200000 1200000 1350000>;
+ opp-hz = /bits/ 64 <667000000>;
+ opp-supported-hw = <0x0006>;
+ };
+
+ opp@750000000,1300 {
+ opp-microvolt = <1300000 1300000 1350000>;
+ opp-hz = /bits/ 64 <750000000>;
+ opp-supported-hw = <0x0004>;
+ };
+
+ opp@800000000,1300 {
+ opp-microvolt = <1300000 1300000 1350000>;
+ opp-hz = /bits/ 64 <800000000>;
+ opp-supported-hw = <0x0004>;
+ };
+
+ opp@900000000,1350 {
+ opp-microvolt = <1350000 1350000 1350000>;
+ opp-hz = /bits/ 64 <900000000>;
+ opp-supported-hw = <0x0004>;
+ };
+ };
+
+ emc_bw_dfs_opp_table: emc-bandwidth-opp-table {
+ compatible = "operating-points-v2";
+
+ opp@12750000 {
+ opp-hz = /bits/ 64 <12750000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <102000>;
+ };
+
+ opp@25500000 {
+ opp-hz = /bits/ 64 <25500000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <204000>;
+ };
+
+ opp@27000000 {
+ opp-hz = /bits/ 64 <27000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <216000>;
+ };
+
+ opp@51000000 {
+ opp-hz = /bits/ 64 <51000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <408000>;
+ };
+
+ opp@54000000 {
+ opp-hz = /bits/ 64 <54000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <432000>;
+ };
+
+ opp@102000000 {
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <816000>;
+ };
+
+ opp@108000000 {
+ opp-hz = /bits/ 64 <108000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <864000>;
+ };
+
+ opp@204000000 {
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <1632000>;
+ };
+
+ opp@333500000 {
+ opp-hz = /bits/ 64 <333500000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <2668000>;
+ };
+
+ opp@375000000 {
+ opp-hz = /bits/ 64 <375000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <3000000>;
+ };
+
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <3200000>;
+ };
+
+ opp@416000000 {
+ opp-hz = /bits/ 64 <416000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <3328000>;
+ };
+
+ opp@450000000 {
+ opp-hz = /bits/ 64 <450000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <3600000>;
+ };
+
+ opp@533000000 {
+ opp-hz = /bits/ 64 <533000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <4264000>;
+ };
+
+ opp@625000000 {
+ opp-hz = /bits/ 64 <625000000>;
+ opp-supported-hw = <0x000E>;
+ opp-peak-kBps = <5000000>;
+ };
+
+ opp@667000000 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-supported-hw = <0x0006>;
+ opp-peak-kBps = <5336000>;
+ };
+
+ opp@750000000 {
+ opp-hz = /bits/ 64 <750000000>;
+ opp-supported-hw = <0x0004>;
+ opp-peak-kBps = <6000000>;
+ };
+
+ opp@800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-supported-hw = <0x0004>;
+ opp-peak-kBps = <6400000>;
+ };
+
+ opp@900000000 {
+ opp-hz = /bits/ 64 <900000000>;
+ opp-supported-hw = <0x0004>;
+ opp-peak-kBps = <7200000>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 2caf6cc6f4b1..44a6dbba7081 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -6,6 +6,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
+#include "tegra30-peripherals-opp.dtsi"
+
/ {
compatible = "nvidia,tegra30";
interrupt-parent = <&lic>;
@@ -417,6 +419,9 @@ actmon@6000c800 {
clock-names = "actmon", "emc";
resets = <&tegra_car TEGRA30_CLK_ACTMON>;
reset-names = "actmon";
+ operating-points-v2 = <&emc_bw_dfs_opp_table>;
+ interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
+ interconnect-names = "cpu-read";
};
gpio: gpio@6000d000 {
@@ -780,6 +785,7 @@ emc: memory-controller@7000f400 {
clocks = <&tegra_car TEGRA30_CLK_EMC>;
nvidia,memory-controller = <&mc>;
+ operating-points-v2 = <&emc_icc_dvfs_opp_table>;
#interconnect-cells = <0>;
};
--
2.29.2
