On Mon, Oct 26, 2020 at 1:55 AM Vidya Sagar <vidyas@xxxxxxxxxx> wrote: > > As specified in the comment for pci_remap_cfgspace() define in > arch/arm64/include/asm/io.h file, PCIe configuration space should be > mapped as strongly ordered. Hence changing to dev_pci_remap_cfgspace() Strictly speaking, strongly ordered is ARMv6/7 terminology. For v8, it's 'nGnRnE' which is what the comment says. > from devm_ioremap_resource() for mapping DBI space as that is nothing > but the root port's own configuration space. > > Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx> > --- > drivers/pci/controller/dwc/pcie-tegra194.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > index b172b1d49713..7a0c64436861 100644 > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > @@ -2108,7 +2108,9 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev) > } > pcie->dbi_res = dbi_res; > > - pci->dbi_base = devm_ioremap_resource(dev, dbi_res); > + pci->dbi_base = devm_pci_remap_cfgspace(dev, > + dbi_res->start, > + resource_size(dbi_res)); This is all going to get removed anyways as I'm working on moving DBI and other region setup into the DWC core. I guess better to do this change first and make it explicit. Rob
