On Wed, Sep 09, 2020 at 04:10:26PM +0800, JC Kuo wrote: > Tegra XHCI controler can be placed in ELPG (Engine Level PowerGated) > state for power saving when all of the connected USB devices are in > suspended state. This patch series includes clk, phy and pmc changes > that are required for properly place controller in ELPG and bring > controller out of ELPG. > > JC Kuo (15): > clk: tegra: Add PLLE HW power sequencer control > clk: tegra: Don't enable PLLE HW sequencer at init Is it safe to apply this second patch before the others have applied? Since we now need to explicitly enable the HW sequencer, it won't be enabled before the corresponding patch does that. So applying patch 2 before the others sounds like it would break existing users of the HW sequencer. Thierry
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