The "dma" variable of tegra_i2c_xfer_msg() function doesn't bring much in
regards to readability and generation of the code.
Besides readability, it's also not very nice that the is_curr_dma_xfer
is initialized in tegra_i2c_xfer_msg() and then could be overridden by
tegra_i2c_config_fifo_trig(). In a result, the "dma" variable creates
slight confusion since it's not instantly obvious why it's set after
tegra_i2c_config_fifo_trig().
Hence should be better to have the variable removed. This makes code
more consistent.
Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
---
drivers/i2c/busses/i2c-tegra.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 89b409130e05..95ee082fe3d8 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -1156,7 +1156,6 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
size_t xfer_size;
u32 *buffer = NULL;
int err = 0;
- bool dma;
u16 xfer_time = 100;
err = tegra_i2c_flush_fifos(i2c_dev);
@@ -1179,7 +1178,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
i2c_dev->dma_buf &&
!i2c_dev->is_curr_atomic_xfer;
tegra_i2c_config_fifo_trig(i2c_dev, xfer_size);
- dma = i2c_dev->is_curr_dma_xfer;
+
/*
* Transfer time in mSec = Total bits / transfer rate
* Total bits = 9 bits per byte (including ACK bit) + Start & stop bits
@@ -1189,7 +1188,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
tegra_i2c_unmask_irq(i2c_dev, int_mask);
- if (dma) {
+ if (i2c_dev->is_curr_dma_xfer) {
if (i2c_dev->msg_read) {
dma_sync_single_for_device(i2c_dev->dev,
i2c_dev->dma_phys,
@@ -1217,13 +1216,13 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
PACKET_HEADER0_PROTOCOL_I2C) |
FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) |
FIELD_PREP(PACKET_HEADER0_PACKET_ID, 1);
- if (dma && !i2c_dev->msg_read)
+ if (i2c_dev->is_curr_dma_xfer && !i2c_dev->msg_read)
*buffer++ = packet_header;
else
i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
packet_header = msg->len - 1;
- if (dma && !i2c_dev->msg_read)
+ if (i2c_dev->is_curr_dma_xfer && !i2c_dev->msg_read)
*buffer++ = packet_header;
else
i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
@@ -1243,13 +1242,13 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
packet_header |= I2C_HEADER_CONT_ON_NAK;
if (msg->flags & I2C_M_RD)
packet_header |= I2C_HEADER_READ;
- if (dma && !i2c_dev->msg_read)
+ if (i2c_dev->is_curr_dma_xfer && !i2c_dev->msg_read)
*buffer++ = packet_header;
else
i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
if (!i2c_dev->msg_read) {
- if (dma) {
+ if (i2c_dev->is_curr_dma_xfer) {
memcpy(buffer, msg->buf, msg->len);
dma_sync_single_for_device(i2c_dev->dev,
i2c_dev->dma_phys,
@@ -1269,7 +1268,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
if (i2c_dev->hw->has_per_pkt_xfer_complete_irq)
int_mask |= I2C_INT_PACKET_XFER_COMPLETE;
- if (!dma) {
+ if (!i2c_dev->is_curr_dma_xfer) {
if (msg->flags & I2C_M_RD)
int_mask |= I2C_INT_RX_FIFO_DATA_REQ;
else if (i2c_dev->msg_buf_remaining)
@@ -1280,7 +1279,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
dev_dbg(i2c_dev->dev, "unmasked irq: %02x\n",
i2c_readl(i2c_dev, I2C_INT_MASK));
- if (dma) {
+ if (i2c_dev->is_curr_dma_xfer) {
time_left = tegra_i2c_wait_completion_timeout(
i2c_dev, &i2c_dev->dma_complete, xfer_time);
--
2.27.0
