Re: [PATCH] arm64: tegra: Properly size register regions for GPU on Tegra194

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On 7/21/2020 8:10 AM, Thierry Reding wrote:
From: Thierry Reding <treding@xxxxxxxxxx>

Memory I/O regions for the GV11B found on Tegra194 are 16 MiB rather
than 256 MiB.

Reported-by: Terje Bergström <tbergstrom@xxxxxxxxxx>
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
  arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 48160f48003a..fc36d683049b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1398,8 +1398,8 @@ sor3: sor@15bc0000 {
gpu@17000000 {
  			compatible = "nvidia,gv11b";
-			reg = <0x17000000 0x10000000>,
-			      <0x18000000 0x10000000>;
+			reg = <0x17000000 0x1000000>,
+			      <0x18000000 0x1000000>;
  			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
  				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
  			interrupt-names = "stall", "nonstall";

Looks good to me.

Reviewed-By: Terje Bergström <tbergstrom@xxxxxxxxxx>

Terje





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