Add binding for NVIDIA's Tegra194 SoC SMMU.
Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Reviewed-by: Robin Murphy <robin.murphy@xxxxxxx>
Signed-off-by: Krishna Reddy <vdumpa@xxxxxxxxxx>
---
.../devicetree/bindings/iommu/arm,smmu.yaml | 25 ++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 93fb9fe068b9..503160a7b9a0 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -44,6 +44,11 @@ properties:
items:
- const: marvell,ap806-smmu-500
- const: arm,mmu-500
+ - description: NVIDIA SoCs that program two ARM MMU-500s identically
+ items:
+ - enum:
+ - nvidia,tegra194-smmu
+ - const: nvidia,smmu-500
- items:
- const: arm,mmu-500
- const: arm,smmu-v2
@@ -61,7 +66,8 @@ properties:
- cavium,smmu-v2
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
'#global-interrupts':
description: The number of global interrupts exposed by the device.
@@ -144,6 +150,23 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra194-smmu
+ then:
+ properties:
+ reg:
+ minItems: 2
+ maxItems: 2
+ else:
+ properties:
+ reg:
+ maxItems: 1
+
examples:
- |+
/* SMMU with stream matching or stream indexing */
--
2.26.2
