On Sun, Jul 12, 2020 at 11:25:05AM +0100, Jon Hunter wrote: > Populate the DFLL node and corresponding PWM pin nodes in order to > enable CPUFREQ support on the Jetson Nano platform. > > Signed-off-by: Jon Hunter <jonathanh@xxxxxxxxxx> > --- > .../boot/dts/nvidia/tegra210-p3450-0000.dts | 37 +++++++++++++++++++ > 1 file changed, 37 insertions(+) Applied, thanks. Thierry
Attachment:
signature.asc
Description: PGP signature
