16.06.2020 16:51, Thierry Reding пишет:
> From: Thierry Reding <treding@xxxxxxxxxx>
>
> The parent clocks are determined by the output that will be used, not by
> the display controller that drives the output. Drop the parent clocks
> from the display controller device tree nodes.
>
> Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
> ---
> arch/arm/boot/dts/tegra114.dtsi | 10 ++++------
> arch/arm/boot/dts/tegra124.dtsi | 10 ++++------
> arch/arm/boot/dts/tegra20.dtsi | 10 ++++------
> arch/arm/boot/dts/tegra30.dtsi | 10 ++++------
> 4 files changed, 16 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> index a06b88b01ef3..23df7a5f37d3 100644
> --- a/arch/arm/boot/dts/tegra114.dtsi
> +++ b/arch/arm/boot/dts/tegra114.dtsi
> @@ -59,9 +59,8 @@ dc@54200000 {
> compatible = "nvidia,tegra114-dc";
> reg = <0x54200000 0x00040000>;
> interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA114_CLK_DISP1>,
> - <&tegra_car TEGRA114_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA114_CLK_DISP1>;
> + clock-names = "dc";
> resets = <&tegra_car 27>;
> reset-names = "dc";
>
> @@ -78,9 +77,8 @@ dc@54240000 {
> compatible = "nvidia,tegra114-dc";
> reg = <0x54240000 0x00040000>;
> interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA114_CLK_DISP2>,
> - <&tegra_car TEGRA114_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA114_CLK_DISP2>;
> + clock-names = "dc";
> resets = <&tegra_car 26>;
> reset-names = "dc";
>
> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> index 1afed8496c95..2c992e8e3594 100644
> --- a/arch/arm/boot/dts/tegra124.dtsi
> +++ b/arch/arm/boot/dts/tegra124.dtsi
> @@ -105,9 +105,8 @@ dc@54200000 {
> compatible = "nvidia,tegra124-dc";
> reg = <0x0 0x54200000 0x0 0x00040000>;
> interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA124_CLK_DISP1>,
> - <&tegra_car TEGRA124_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA124_CLK_DISP1>;
> + clock-names = "dc";
> resets = <&tegra_car 27>;
> reset-names = "dc";
>
> @@ -120,9 +119,8 @@ dc@54240000 {
> compatible = "nvidia,tegra124-dc";
> reg = <0x0 0x54240000 0x0 0x00040000>;
> interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA124_CLK_DISP2>,
> - <&tegra_car TEGRA124_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA124_CLK_DISP2>;
> + clock-names = "dc";
> resets = <&tegra_car 26>;
> reset-names = "dc";
>
> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> index f0a172c61b26..8b6909839f59 100644
> --- a/arch/arm/boot/dts/tegra20.dtsi
> +++ b/arch/arm/boot/dts/tegra20.dtsi
> @@ -103,9 +103,8 @@ dc@54200000 {
> compatible = "nvidia,tegra20-dc";
> reg = <0x54200000 0x00040000>;
> interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA20_CLK_DISP1>,
> - <&tegra_car TEGRA20_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA20_CLK_DISP1>;
> + clock-names = "dc";
> resets = <&tegra_car 27>;
> reset-names = "dc";
>
> @@ -120,9 +119,8 @@ dc@54240000 {
> compatible = "nvidia,tegra20-dc";
> reg = <0x54240000 0x00040000>;
> interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA20_CLK_DISP2>,
> - <&tegra_car TEGRA20_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA20_CLK_DISP2>;
> + clock-names = "dc";
> resets = <&tegra_car 26>;
> reset-names = "dc";
>
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index 27000f0ba35b..23fedb76e5ae 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -200,9 +200,8 @@ dc@54200000 {
> compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
> reg = <0x54200000 0x00040000>;
> interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA30_CLK_DISP1>,
> - <&tegra_car TEGRA30_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA30_CLK_DISP1>;
> + clock-names = "dc";
> resets = <&tegra_car 27>;
> reset-names = "dc";
>
> @@ -219,9 +218,8 @@ dc@54240000 {
> compatible = "nvidia,tegra30-dc";
> reg = <0x54240000 0x00040000>;
> interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA30_CLK_DISP2>,
> - <&tegra_car TEGRA30_CLK_PLL_P>;
> - clock-names = "dc", "parent";
> + clocks = <&tegra_car TEGRA30_CLK_DISP2>;
> + clock-names = "dc";
> resets = <&tegra_car 26>;
> reset-names = "dc";
>
>
Hello Thierry,
Tegra DRM fails to probe after this change using next-20200624 on T20/30
(T124 also should be broken):
tegra-dc 54200000.dc: failed to get parent clock
tegra-dc 54200000.dc: failed to probe RGB output: -2
BTW, the commit's title is misleading since the patch touches all SoCs
and not only the T114.
Please correct or drop this patch, thanks in advance.
