On 05/04/20 7:41 PM, Dmitry Osipenko wrote:
External email: Use caution opening links or attachments 04.04.2020 22:29, Sumit Gupta пишет: ...+static void tegra_read_counters(struct work_struct *work) +{ + struct read_counters_work *read_counters_work; + struct tegra_cpu_ctr *c; + u64 val; + + /* + * ref_clk_counter(32 bit counter) runs on constant clk, + * pll_p(408MHz).Is changing PLLP rate really impossible on T194? What makes you say that it runs on a fixed 408MHz?
Pasting below from TRM. Register "NVFREQ_FEEDBACK_EL1": .... [31:0] PLLP counter: This counter counts at a fixed frequency (408 MHz).
