On Tue, Mar 10, 2020 at 07:55:39PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:19, Thierry Reding пишет:
> > From: Joseph Lo <josephl@xxxxxxxxxx>
> >
> > The EMC clock needs to carefully coordinate with the EMC controller
> > programming to make sure external memory can be properly clocked. Do so
> > by hooking up the EMC clock with an EMC provider that will specify which
> > rates are supported by the EMC and provide a callback to use for setting
> > the clock rate at the EMC.
> >
> > Based on work by Peter De Schrijver <pdeschrijver@xxxxxxxxxx>.
> >
> > Signed-off-by: Joseph Lo <josephl@xxxxxxxxxx>
> > Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
> > ---
> > Changes in v5:
> > - major rework and cleanup
>
> ...
>
> > +static int tegra210_emc_resume(struct device *dev)
> > +{
> > + struct tegra_emc *emc = dev_get_drvdata(dev);
> > +
> > + emc->emc_suspend = false;
>
> Looks like the 'emc->emc_suspend' isn't really needed, nothing in kernel
> shall touch EMC rate at this point.
I've removed this.
> Perhaps should be better to make EMC clk exlusive in order to catch
> abusers, please see tegra30-emc suspend/resume for an example.
Good idea. Done.
> > + clk_set_rate(emc->emc_clk, emc->emc_resume_rate);
> > +
> > + pr_debug("%s at rate %lu\n", __func__, clk_get_rate(emc->emc_clk));
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > +static const struct dev_pm_ops tegra210_emc_pm_ops = {
> > + SET_SYSTEM_SLEEP_PM_OPS(tegra210_emc_suspend, tegra210_emc_resume)
> > +};
> What about to use the default suspend/resume level?
I don't understand. This is already the default suspend/resume level,
isn't it?
Thierry
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