On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote: > Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can operate > either in root port mode or in end point mode but only in one mode at a time. > Platform P2972-0000 supports enabling endpoint mode for C5 controller. This > patch series adds support for PCIe endpoint mode in both the driver as well as > in DT. > This patch series depends on the changes made for Synopsys DesignWare endpoint > mode subsystem that are recently accepted. > @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211 > which in turn depends on the patch made by Kishon > @ https://patchwork.kernel.org/patch/10975123/ > which is also under review. > > V4: > * Started using threaded irqs instead of kthreads > > V3: > * Re-ordered patches in the series to make the driver change as the last patch > * Took care of Thierry's review comments > > V2: > * Addressed Thierry & Bjorn's review comments > * Added EP mode specific binding documentation to already existing binding documentation file > * Removed patch that enables GPIO controller nodes explicitly as they are enabled already > > Vidya Sagar (5): > soc/tegra: bpmp: Update ABI header > dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194 > arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194 > arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 > platform > PCI: tegra: Add support for PCIe endpoint mode in Tegra194 Hi Lorenzo, I've acked patches 1, 2 and 5 of the series. I think you're going to need to apply patch 1 in order to satisfy a build-time dependency from patch 5. I can apply patches 3 and 4 to the Tegra tree since they're only adding device tree content that may conflict with some other patches that I have in the Tegra tree. Does that sound reasonable? Thierry
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