On 10/3/19 2:50 PM, Stephen Warren wrote:
From: Stephen Warren <swarren@xxxxxxxxxx> For a little over a year, U-Boot on Tegra124 has configured the flow controller to perform automatic RAM re-repair on off->on power transitions of the CPU rail1]. This is mandatory for correct operation of Tegra124. However, RAM re-repair relies on certain clocks, which the kernel must enable and leave running. The fuse clock is one of those clocks. Mark this clock as critical so that LP1 power mode (system suspend) operates correctly. [1] 3cc7942a4ae5 ARM: tegra: implement RAM repair
Thierry, this series doesn't seem to be applied yet; could you please take a look? Thanks.
