On Wed, Oct 16, 2019 at 04:16:27PM +0300, Dmitry Osipenko wrote: > 16.10.2019 08:27, Viresh Kumar пишет: > > On 16-10-19, 00:16, Dmitry Osipenko wrote: > >> Hello, > >> > >> This series moves intermediate-clk handling from tegra20-cpufreq into > >> tegra-clk driver, this allows us to switch to generic cpufreq-dt driver > >> which brings voltage scaling, per-hardware OPPs and Tegra30 support out > >> of the box. All boards need to adopt CPU OPPs in their device-trees in > >> order to get cpufreq support. This series adds OPPs only to selective > >> boards because there is assumption in a current device-trees that CPU > >> voltage is set for 1GHz freq and this won't work for those CPUs that > >> can go over 1GHz and thus require voltage regulators to be set up for > >> voltage scaling support (CC'ed Marcel for Toradex boards). We could > >> probably add delete-node for OPPs over 1GHz if there are not actively > >> maintained boards. > > > > How do you want to get these patches merged ? Can I just pick the cpufreq bits > > alone ? > > > > The cpufreq bits strictly depend on the clk patches and the regulators > coupler/balancer series. Hence all patches in this series should collect > acks from relevant maintainers and then Thierry will pick up the > patchsets in a correct order via tegra tree, at least that's my vision. > > Thierry, are you okay with that approach? Works for me. I already have a set of clock patches that I'd like to merge via the Tegra tree because of a runtime dependency, so it'd be easy to apply these on top of that. Thierry
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