On 30/09/2019 21:52, Jon Hunter wrote:
On 30/09/2019 17:51, Ben Dooks wrote:
Set the offset to 0 for TDM mode, as per the current setup. Note we also
move the data offset programming to the i2s hw_parameters call as per
the suggestion from Jon Hunter.
Signed-off-by: Ben Dooks <ben.dooks@xxxxxxxxxxxxxxx>
---
v2:
- fix the review comments and move the i2s offset setting
---
sound/soc/tegra/tegra30_i2s.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c
index c573151da341..a03692b0afc3 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -66,7 +66,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
unsigned int fmt)
{
struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
- unsigned int mask = 0, val = 0;
+ unsigned int mask = 0, val = 0, data_offset = 1;
unsigned int ch_mask, ch_val = 0;
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
@@ -95,11 +95,13 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;
val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC;
val |= TEGRA30_I2S_CTRL_LRCK_L_LOW;
+ data_offset = 0;
break;
case SND_SOC_DAIFMT_DSP_B:
ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;
val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC;
val |= TEGRA30_I2S_CTRL_LRCK_R_LOW;
+ data_offset = 0;
My understanding is that the difference between dsp-a and dsp-b is that
dsp-a has an offset of 1 and dsp-b has an offset of 0.
Ok, can anyone else check this before I make the change for DSP_B ?
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
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