On 9/4/19 1:21 PM, Greg KH wrote:
> On Wed, Sep 04, 2019 at 09:43:08AM +0800, JC Kuo wrote:
>> On 9/3/19 9:58 PM, Greg KH wrote:
>>> On Mon, Sep 02, 2019 at 04:21:27PM +0800, JC Kuo wrote:
>>>> Tegra194 XUSB host controller has rearranged mailbox registers. This
>>>> commit makes mailbox registers address a part of "soc" data so that
>>>> xhci-tegra driver can be used for Tegra194.
>>>>
>>>> Signed-off-by: JC Kuo <jckuo@xxxxxxxxxx>
>>>> ---
>>>> drivers/usb/host/xhci-tegra.c | 58 +++++++++++++++++++++++++----------
>>>> 1 file changed, 42 insertions(+), 16 deletions(-)
>>>>
>>>> diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
>>>> index dafc65911fc0..247b08ca49ee 100644
>>>> --- a/drivers/usb/host/xhci-tegra.c
>>>> +++ b/drivers/usb/host/xhci-tegra.c
>>>> @@ -42,19 +42,18 @@
>>>> #define XUSB_CFG_CSB_BASE_ADDR 0x800
>>>>
>>>> /* FPCI mailbox registers */
>>>> -#define XUSB_CFG_ARU_MBOX_CMD 0x0e4
>>>> +/* XUSB_CFG_ARU_MBOX_CMD */
>>>> #define MBOX_DEST_FALC BIT(27)
>>>> #define MBOX_DEST_PME BIT(28)
>>>> #define MBOX_DEST_SMI BIT(29)
>>>> #define MBOX_DEST_XHCI BIT(30)
>>>> #define MBOX_INT_EN BIT(31)
>>>> -#define XUSB_CFG_ARU_MBOX_DATA_IN 0x0e8
>>>> +/* XUSB_CFG_ARU_MBOX_DATA_IN and XUSB_CFG_ARU_MBOX_DATA_OUT */
>>>> #define CMD_DATA_SHIFT 0
>>>> #define CMD_DATA_MASK 0xffffff
>>>> #define CMD_TYPE_SHIFT 24
>>>> #define CMD_TYPE_MASK 0xff
>>>> -#define XUSB_CFG_ARU_MBOX_DATA_OUT 0x0ec
>>>> -#define XUSB_CFG_ARU_MBOX_OWNER 0x0f0
>>>> +/* XUSB_CFG_ARU_MBOX_OWNER */
>>>> #define MBOX_OWNER_NONE 0
>>>> #define MBOX_OWNER_FW 1
>>>> #define MBOX_OWNER_SW 2
>>>> @@ -146,6 +145,13 @@ struct tegra_xusb_phy_type {
>>>> unsigned int num;
>>>> };
>>>>
>>>> +struct tega_xusb_mbox_regs {
>>>> + unsigned int cmd;
>>>> + unsigned int data_in;
>>>> + unsigned int data_out;
>>>> + unsigned int owner;
>>>
>>> Shouldn't these all be u8 values?
>>>
>> These data members represent register offset in Tegra XUSB FPCI area. Size of
>> FPCI area is 0x1000, so it is possible for future Tegra XUSB to have mailbox
>> registers allocated to somewhere > 0x100.
>
> Ok, then u16?
>
Thierry said he'd prefer to use "unsized" types to distinguish between register
offsets and values. I am fine with either way.
>>> This did not change any existing functionality, is there a follow-on
>>> patch somewhere that takes advantage of this change to enable different
>>> hardware? Otherwise this doesn't seem worth it.
>>>
>> Yes, I will submit another patch to enable Tegra194 XHCI. It will make use of
>> this patch to declare Tegra194 XUSB mailbox registers as:
>>
>> .mbox = {
>> .cmd = 0x68,
>> .data_in = 0x6c,
>> .data_out = 0x70,
>> .owner = 0x74,
>> },
>
> Can you send that out as patch 2/2 so that we see the need for this
> change?
>
Yes, I will submit it along with this one.
Thanks,
JC
