On Mon, Aug 12, 2019 at 12:00:29AM +0300, Dmitry Osipenko wrote: > A proper External Memory Controller clock rounding and parent selection > functionality is required by the EMC drivers, it is not available using > the generic clock implementation because only the Memory Controller driver > is aware of what clock rates are actually available for a particular > device. EMC drivers will have to register a Tegra-specific CLK-API > callback which will perform rounding of a requested rate. EMC clock users > won't be able to request EMC clock by getting -EPROBE_DEFER until EMC > driver is probed and the callback is set up. [...] > diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile > index 4812e45c2214..df966ca06788 100644 > --- a/drivers/clk/tegra/Makefile > +++ b/drivers/clk/tegra/Makefile > @@ -17,7 +17,9 @@ obj-y += clk-tegra-fixed.o > obj-y += clk-tegra-super-gen4.o > obj-$(CONFIG_TEGRA_CLK_EMC) += clk-emc.o > obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o > +obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20-emc.o > obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o > +obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra20-emc.o > obj-$(CONFIG_ARCH_TEGRA_114_SOC) += clk-tegra114.o > obj-$(CONFIG_ARCH_TEGRA_124_SOC) += clk-tegra124.o > obj-$(CONFIG_TEGRA_CLK_DFLL) += clk-tegra124-dfll-fcpu.o Doesn't it complain when both CONFIG_ARCH_TEGRA_2x_SOC and CONFIG_ARCH_TEGRA_3x_SOC are enabled at the same time? Best Regards, Michał Mirosław
