Convert all 1MHz literals to a verbose constant for better readability.
Suggested-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
---
drivers/clocksource/timer-tegra.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c
index a7fa12488066..2a428fdf702f 100644
--- a/drivers/clocksource/timer-tegra.c
+++ b/drivers/clocksource/timer-tegra.c
@@ -44,6 +44,8 @@
#define TIMER1_IRQ_IDX 0
#define TIMER10_IRQ_IDX 10
+#define TIMER_1MHz 1000000
+
static u32 usec_config;
static void __iomem *timer_reg_base;
@@ -158,7 +160,7 @@ static unsigned long tegra_delay_timer_read_counter_long(void)
static struct delay_timer tegra_delay_timer = {
.read_current_timer = tegra_delay_timer_read_counter_long,
- .freq = 1000000,
+ .freq = TIMER_1MHz,
};
#endif
@@ -224,7 +226,7 @@ static inline unsigned long tegra_rate_for_timer(struct timer_of *to,
* parent clock.
*/
if (tegra20)
- return 1000000;
+ return TIMER_1MHz;
return timer_of_rate(to);
}
@@ -313,11 +315,11 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20,
}
}
- sched_clock_register(tegra_read_sched_clock, 32, 1000000);
+ sched_clock_register(tegra_read_sched_clock, 32, TIMER_1MHz);
ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
- "timer_us", 1000000,
- 300, 32, clocksource_mmio_readl_up);
+ "timer_us", TIMER_1MHz, 300, 32,
+ clocksource_mmio_readl_up);
if (ret)
pr_err("failed to register clocksource: %d\n", ret);
--
2.21.0
