Quoting Dmitry Osipenko (2019-04-11 14:48:34) > There are wrongly set parenthesis in the code that are resulting in a > wrong configuration being programmed for PLLM. The original fix was made > by Danny Huang in the downstream kernel. The patch was tested on Nyan Big > Tegra124 chromebook, PLLM rate changing works correctly now and system > doesn't lock up after changing the PLLM rate due to EMC scaling. > > Cc: <stable@xxxxxxxxxxxxxxx> > Tested-by: Steev Klimaszewski <steev@xxxxxxxx> > Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> > --- Applied to clk-next