Hi Geert,
On Tue, 23 Apr 2019 at 09:49, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Jonas,
>
> On Thu, Apr 18, 2019 at 1:12 PM Jonas Gorski <jonas.gorski@xxxxxxxxx> wrote:
> > Add a clock specific flag to switch register accesses to big endian, to
> > allow runtime configuration of big endian divider clocks.
> >
> > Signed-off-by: Jonas Gorski <jonas.gorski@xxxxxxxxx>
> > ---
> > V2 -> V3:
> > * fix passed arguments to clk_div_readl found by kbuild
> > * drop unneeded else in clk_div_readl
> > V1 -> V2:
> > * switch from global to local flag
> >
> > drivers/clk/clk-divider.c | 26 ++++++++++++++++++++++----
> > include/linux/clk-provider.h | 4 ++++
> > 2 files changed, 26 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
> > index e5a17265cfaf..25c7404e376c 100644
> > --- a/drivers/clk/clk-divider.c
> > +++ b/drivers/clk/clk-divider.c
> > @@ -25,6 +25,24 @@
> > * parent - fixed parent. No clk_set_parent support
> > */
> >
> > +static inline u32 clk_div_readl(struct clk_divider *divider)
> > +{
> > + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
> > + return ioread32be(divider->reg);
> > +
> > + return clk_readl(divider->reg);
> > +}
> > +
> > +static inline void clk_div_writel(struct clk_divider *divider, u32 val)
> > +{
> > + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
> > + iowrite32be(val, divider->reg);
> > + else
> > + clk_writel(val, divider->reg);
> > +}
> > +
> > +#define div_mask(width) ((1 << (width)) - 1)
>
> What's the purpose of adding this definition?
> It does not seem to be used.
No purpose at all, it's an uncaught artifact from rebasing ._.
Stephen, which one is your preferred way of fixing that?
a) a new V4 patchset without this line
b) a follow up patch that removes it
c) just removing the line yourself
Regards
Jonas
