Re: [PATCH 08/30] PCI: tegra: Disable AFI dynamic clock gating

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Apr 11, 2019 at 10:33:33PM +0530, Manikanta Maddireddy wrote:
> Outstanding write counter in AFI is used to generate idle signal to
> dynamically gate the AFI clock. When there are 32 outstanding writes
> from AFI to memory, the outstanding write counter overflows and
> indicates that there are "0" outstanding write transactions.
> 
> When memory controller is under heavy load, write completions to AFI
> gets delayed and AFI write counter overflows. This causes AFI clock gating
> even when there are outstanding transactions towards memory controller
> resutling in system hang.

s/resutling/resulting/

With that fixed:

Acked-by: Thierry Reding <treding@xxxxxxxxxx>

Attachment: signature.asc
Description: PGP signature


[Index of Archives]     [ARM Kernel]     [Linux ARM]     [Linux ARM MSM]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux