Re: [PATCH 4/6] arm64: dts: tegra210: add CPU idle states properties

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On 1/24/19 7:21 PM, Jon Hunter wrote:

On 07/01/2019 03:28, Joseph Lo wrote:
Add idle states properties for generic ARM CPU idle driver. This
includes a C7 state which is the power down state of CPU cores.

Signed-off-by: Joseph Lo <josephl@xxxxxxxxxx>
---
Note:
This dt patch depends on the DT changes in below series.
http://patchwork.ozlabs.org/project/linux-tegra/list/?series=84380
---
  arch/arm64/boot/dts/nvidia/tegra210.dtsi | 17 +++++++++++++++++
  1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 143bd103c923..b583d3065946 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1308,24 +1308,41 @@
  				 <&dfll>;
  			clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
  			clock-latency = <300000>;
+			cpu-idle-states = <&C7>;
  		};
cpu@1 {
  			device_type = "cpu";
  			compatible = "arm,cortex-a57";
  			reg = <1>;
+			cpu-idle-states = <&C7>;
  		};
cpu@2 {
  			device_type = "cpu";
  			compatible = "arm,cortex-a57";
  			reg = <2>;
+			cpu-idle-states = <&C7>;
  		};
cpu@3 {
  			device_type = "cpu";
  			compatible = "arm,cortex-a57";
  			reg = <3>;
+			cpu-idle-states = <&C7>;
+		};
+
+		idle-states {
+			entry-method = "psci";
+
+			C7: c7 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x40000007>;
+				wakeup-latency-us = <130>;
+				min-residency-us = <1000>;
+				idle-state-name = "c7-cpu-powergated";
+				status = "disabled";
+			};
  		};
  	};

The binding doc says that both 'entry-latency-us' and 'exit-latency-us'
properties are required. Are we able to populate these?


Indeed, will fix that.

Thanks,
Joseph




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