On 12/18/18 5:37 PM, Rafael J. Wysocki wrote:
On Tue, Dec 18, 2018 at 10:13 AM Joseph Lo <josephl@xxxxxxxxxx> wrote:
The Tegra124 cpufreq driver has no information to handle the Vdd-CPU
rail. So this driver shouldn't handle for the CPU clock switching from
DFLL to other PLL clocks. It was designed to work on DFLL clock only,
which handle the frequency/voltage scaling in the background.
This patch removes the driver dependency of the CPU rail, as well as not
allow it to be built as a module and remove the removal function. So it
can keep working on DFLL clock.
Cc: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
Cc: linux-pm@xxxxxxxxxxxxxxx
Signed-off-by: Joseph Lo <josephl@xxxxxxxxxx>
Acked-by: Jon Hunter <jonathanh@xxxxxxxxxx>
Acked-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
I'm assuming that this entire series will go in via arm-soc, so I
won't be picking up the cpufreq patches from it.
Please let me know if that is not what you want.
Thanks,
Rafael
Hi Rafael,
Thanks, will check with Thierry.
Joseph
