On Thu, Dec 13, 2018 at 10:35 AM Joseph Lo <josephl@xxxxxxxxxx> wrote: > > The Tegra124 cpufreq driver has no information to handle the Vdd-CPU > rail. So this driver shouldn't handle for the CPU clock switching from > DFLL to other PLL clocks. It was designed to work on DFLL clock only, > which handle the frequency/voltage scaling in the background. > > This patch removes the driver dependency of the CPU rail, as well as not > allow it to be built as a module and remove the removal function. So it > can keep working on DFLL clock. I assume this entire series to go in via arm-soc, so I won't be picking up cpufreq changes from it. Thanks, Rafael
