Enable DFLL clock for Smaug board.
Signed-off-by: Joseph Lo <josephl@xxxxxxxxxx>
---
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index b3930a9dd139..beac7b0bf436 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1698,6 +1698,18 @@
status = "okay";
};
+ clock@70110000 {
+ status = "okay";
+ nvidia,sample-rate = <12500>;
+ nvidia,droop-ctrl = <0x00000f00>;
+ nvidia,force-mode = <1>;
+ nvidia,cf = <6>;
+ nvidia,ci = <0>;
+ nvidia,cg = <2>;
+ nvidia,i2c-fs-rate = <400000>;
+ vdd-cpu-supply = <&max77621_cpu>;
+ };
+
aconnect@702c0000 {
status = "okay";
--
2.19.2
