Enable IOMMU for all SDHCI controllers in Tegra186. Signed-off-by: Krishna Reddy <vdumpa@xxxxxxxxxx> --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 230c0c8..996997e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -234,6 +234,7 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03400000 0x0 0x10000>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + iommus = <&smmu TEGRA186_SID_SDMMC1>; clocks = <&bpmp TEGRA186_CLK_SDMMC1>; clock-names = "sdhci"; resets = <&bpmp TEGRA186_RESET_SDMMC1>; @@ -259,6 +260,7 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03420000 0x0 0x10000>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + iommus = <&smmu TEGRA186_SID_SDMMC2>; clocks = <&bpmp TEGRA186_CLK_SDMMC2>; clock-names = "sdhci"; resets = <&bpmp TEGRA186_RESET_SDMMC2>; @@ -279,6 +281,7 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03440000 0x0 0x10000>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + iommus = <&smmu TEGRA186_SID_SDMMC3>; clocks = <&bpmp TEGRA186_CLK_SDMMC3>; clock-names = "sdhci"; resets = <&bpmp TEGRA186_RESET_SDMMC3>; @@ -301,6 +304,7 @@ compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03460000 0x0 0x10000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + iommus = <&smmu TEGRA186_SID_SDMMC4>; clocks = <&bpmp TEGRA186_CLK_SDMMC4>; clock-names = "sdhci"; assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>, -- 2.1.4
