On Tue, Sep 18, 2018 at 10:51:20AM +0100, Robin Murphy wrote: > On 2018-09-14 12:07 AM, David Gilhooley wrote: > >History: > > > >NVIDIA’s Xavier (Tegra194) SOC has multiple SMMU instances that must be > >coordinated together. Specifically, there are two instances of ARM’s > >MMU-500 shared between coherent DMA devices and one instance of ARM > >MMU-500 for non-coherent DMA devices. The two MMU-500s were created to > >double the memory bandwidth of a single MMU-500. This is the reason why > >Tegra194 does not work with anything but our own Linux fork. Urgh, you actually went and built this? Let's just put the things into bypass and move on. I have absolutely no interest in maintaining upstream driver support for this junk. If bypass won't do it for you, I think you seriously need to consider either reworking the smmu driver as a library so you can maintain the mess yourselves (this might also help with the ongoing PM and errata threads), or providing your own dma_ops which handle multiple domains under the hood, although I don't know how feasible that would be. Will
