Re: [PATCH 7/7] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1

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Looks like patch 6 will probably cause tegra-sdhci to start advertising faster modes (see " if (!IS_ERR(host->mmc->supply.vqmmc))" in sdhci-tegra.c). With that patch and this, will the SDHCI core start to try putting us into these higher modes? Clearly that won't work yet before the upcoming patches.

Mikko

On 20.07.2018 15:45, Aapo Vienamo wrote:
Allow sdmmc1 to set the signaling voltage to 1.8 V in order to support
faster signaling modes.

Signed-off-by: Aapo Vienamo <avienamo@xxxxxxxxxx>
---
  arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 1 -
  1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
index 9d5a0e6..365726d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
@@ -1452,7 +1452,6 @@
  	sdhci@700b0000 {
  		status = "okay";
  		bus-width = <4>;
-		no-1-8-v;
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
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