Quoting Aapo Vienamo (2018-07-04 03:17:33) > diff --git a/drivers/clk/tegra/div71.c b/drivers/clk/tegra/div71.c > new file mode 100644 > index 0000000..1a5e04c > --- /dev/null > +++ b/drivers/clk/tegra/div71.c > @@ -0,0 +1,54 @@ > +/* > + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#include <linux/kernel.h> You can include <asm/div64.h> instead. > + > +#include "clk.h" > + > +#define div_mask(w) ((1 << (w)) - 1) > + > +int div71_get(unsigned long rate, unsigned parent_rate, u8 width, > + u8 frac_width, u8 flags) > +{ > + u64 divider_ux1 = parent_rate; Hmm ok, now it's unsigned. That's works too. > + int mul; > + > + if (!rate) > + return 0; > + > + mul = 1 << frac_width; > + > + if (!(flags & TEGRA_DIVIDER_INT)) > + divider_ux1 *= mul; > + > + if (flags & TEGRA_DIVIDER_ROUND_UP) > + divider_ux1 += rate - 1; > + > + do_div(divider_ux1, rate); > + > + if (flags & TEGRA_DIVIDER_INT) > + divider_ux1 *= mul; > + > + if (divider_ux1 < mul) > + return 0; > + > + divider_ux1 -= mul; > + > + if (divider_ux1 > div_mask(width)) > + return div_mask(width); > + > + return divider_ux1; > +} -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
