Hi Stefan,
On Thu, 21 Jun 2018 22:31:43 +0200
Stefan Agner <stefan@xxxxxxxx> wrote:
> Add support for the NAND flash controller found on NVIDIA
> Tegra 2 SoCs. This implementation does not make use of the
> command queue feature. Regular operations using ->exec_op()
> use PIO mode for data transfers. Raw, ECC and OOB read/writes
> make use of the DMA mode for data transfer.
>
> Signed-off-by: Lucas Stach <dev@xxxxxxxxxx>
> Signed-off-by: Stefan Agner <stefan@xxxxxxxx>
> Reviewed-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> ---
> MAINTAINERS | 7 +
> drivers/mtd/nand/raw/Kconfig | 6 +
> drivers/mtd/nand/raw/Makefile | 1 +
> drivers/mtd/nand/raw/tegra_nand.c | 1225 +++++++++++++++++++++++++++++
> 4 files changed, 1239 insertions(+)
> create mode 100644 drivers/mtd/nand/raw/tegra_nand.c
I think we're almost good. No big issues spotted in this version.
Can you fix the CHECKs/WARNINGs reported by checkpatch --strict (most
of them are valid)?
> +
> +static int tegra_nand_remove(struct platform_device *pdev)
> +{
> + struct tegra_nand_controller *ctrl = platform_get_drvdata(pdev);
> +
> + nand_release(nand_to_mtd(ctrl->chip));
Use mtd_device_unregister() + nand_cleanup() instead of nand_release().
nand_release() is broken in that it does not check the return code of
mtd_device_unregister() before calling nand_cleanup(), and does not
propagate mtd_device_unregister() ret code to its caller.
> +
> + clk_disable_unprepare(ctrl->clk);
> +
> + return 0;
> +}
Thanks for the great work you've done! Yay, another driver implementing
->exec_op()!
Boris
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