On Tue, 2018-05-08 at 14:35 +0200, Krzysztof Kozlowski wrote:
> On Fri, May 4, 2018 at 12:14 PM, Marcel Ziswiler
> <marcel.ziswiler@xxxxxxxxxxx> wrote:
> > Hi Krzysztof
> >
> > On Fri, 2018-05-04 at 12:03 +0200, Krzysztof Kozlowski wrote:
> > > On Fri, May 4, 2018 at 11:19 AM, Stefan Agner <stefan@xxxxxxxx>
> > > wrote:
> > > > On 03.05.2018 17:08, Krzysztof Kozlowski wrote:
> > > > > Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512
> > > > > MB
> > > > > RAM
> > > > > (with 1024 MB NAND) flavors. Add support for the 256 MB
> > > > > version
> > > > > on Iris
> > > > > evaluation board.
> > > >
> > > > To we really need to specify memory size these days? I think
> > > > all
> > > > common
> > > > boot loaders fill the memory node anyway.
> > > >
> > > > arch/arm/boot/dts/imx6qdl-apalis.dtsi:
> > > > /* Will be filled by the bootloader */
> > > > memory@10000000 {
> > > > reg = <0x10000000 0>;
> > > > };
> > > >
> > > >
> > > > I think we should just rename tegra20-colibri-512.dtsi =>
> > > > tegra20-colibri.dtsi and tegra20-iris-512.dts => tegra20-
> > > > iris.dts
> > > > to
> > > > avoid confusion and add such an empty node.
> > >
> > > Having memory node is requirement of DeviceTree specification (at
> > > least one cpu and memory node). Of course if bootloader fills it,
> > > then
> > > we could assume that specification is satisfied... but what if
> > > some
> > > bootloader skips it? This creates quite specific dependency
> > > between
> > > kernel's DTS and bootloader.
> >
> > Yes, no system boots without any boot loader e.g. initialising the
> > memory and what not. So there are obviously quite specific
> > dependencies.
>
> Sorry for late reply, I missed your emails because unfortunately
> Google marks messages coming for Toradex as spam ("This message has a
> from address in toradex.com but has failed toradex.com's required
> tests for authentication.").
Argh, I guess that happens if you have stubborn IT departments which
still believe in M$. Sending via private email now.
> Therefore I did not include your comments
> and sent v3.
Yeah, I noticed that. It's forgiven, don't worry (;-p).
> > > One safe solution would be to specify 256 MB memory node for both
> > > boards and assume that bootloader will bump it to 512 MB for
> > > specific
> > > module.
> >
> > Like I mentioned this actually used to be how it was done however
> > lately it has been agreed that any boot loader anyway needs to do
> > the
> > device tree dance (e.g. even just loading and passing it).
>
> Then the safest way is to provide /memory node with 256 MB. If some
> bootloader omits it (e.g. because it is too old or by any mistake)
> the
> FDT will be still usable with reduced memory in case of 512 board.
Makes sense.
> > > > > Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> > > > >
> > > > > ---
> > > > >
> > > > > Changes since v1:
> > > > > 1. Fix memory size in tegra20-colibri-256.dtsi (was working
> > > > > fine
> > > > > because
> > > > > my bootloader uses mem= argument).
> > > >
> > > > What boot loader are you using? You even can omit mem= if your
> > > > boot
> > > > loader fills the memory node properly.
> > >
> > > I use the one provided by vendor - Toradex. By default it passes
> > > both
> > > mem= and few other mem-like arguments (for FB and video
> > > processor) to
> > > command line. I believe it does not adjust the DTB itself because
> > > Toradex prepared this bootloader for... 3.1 kernel without DTB. 7
> > > years old kernel. :)
> >
> > Remember our regular BSP is still based on NVIDIA's downstream
> > Linux
> > for Tegra aka L4T R16.5 based on Linux kernel 3.1.10 which does not
> > even use any device tree yet.
>
> Yes, I noticed. I am trying to bring it fully on new kernels but no
> huge successes so far... I'm stuck on NAND trying Lucas Stach's old
> patchset.
Yeah, for a while I kept his patch set alive as well. I believe 4.4 was
still working fine passing all MTD tests. However, lately there were so
many changes it all fell apart. About a month ago I spend a couple
nights trying to get it running again but something is still not quite
right. Yet have to sync with Stefan in my team who is much more
knowledgeable about latest NAND development.
> Best regards,
> Krzysztof
Cheers
Marcel
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