* Tony Lindgren <tony@xxxxxxxxxxx> [170914 16:38]: > * Linus Walleij <linus.walleij@xxxxxxxxxx> [170914 07:00]: > > On Fri, Sep 1, 2017 at 8:57 PM, Thierry Reding <thierry.reding@xxxxxxxxx> wrote: > > > > > From: Thierry Reding <treding@xxxxxxxxxx> > > > > > > Some GPIO controllers are subdivided into multiple logical blocks called > > > banks (or ports). This is often caused by the design assigning separate > > > resources, such as register regions or interrupts, to each bank, or some > > > set of banks. > > > > > > This commit adds support for describing controllers that have such a > > > banked design and provides common code for dealing with them. > > > > > > Signed-off-by: Thierry Reding <treding@xxxxxxxxxx> > > > > This patch makes me really happy. > > > > It pulls in a lot of weirdness to the OF core and creates a coherent > > way of handling these "banked" GPIO chips. > > > > CC to Tony to make sure he checks that OMAP is ready to use this > > too. > > Adding Grygorii to Cc as well, we'll take a look. > > Probably the runtime PM will be an issue here still. We must currently > do runtime PM on per GPIO bank basis instead of per GPIO pin level as > we constantly runtime_suspend/resume the whole GPIO bank for idle modes > on the SoCs that support PM. So the usage count for the bank needs to > be either 0 or 1 and cannot be the lines used in the bank. And based on a quick look at this series it should not cause problems there. For managing the banks in a generic way, I like the idea too. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
