Re: [PATCH v1 0/9] Support UDC on Tegra 20/30/114/124

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On 06.07.2017 01:54, Stephen Warren wrote:
> On 07/05/2017 04:13 PM, Dmitry Osipenko wrote:
>> On 05.07.2017 23:31, Stephen Warren wrote:
>>> On 07/05/2017 11:19 AM, Dmitry Osipenko wrote:
>>>> Some time ago Thierry Reding sent out patches that enabled UDC on NVIDIA
>>>> Tegra, unfortunately they haven't got enough traction to get into the
>>>> kernel. I've rebased those patches and added a fix for the Ethernet USB
>>>> Gadget on Tegra20, Marc Dietrich tested UDC driver on AC100 and Nicolas
>>>> Chauvet on TK1. Like an original patchset, this series adds support for
>>>> the peripheral mode only.
>>>
>>> Does this mean that the relevant ports no longer support host mode? That's going
>>> to be a user-visible regression, which doesn't sound like a good idea. Isn't OTG
>>> possible instead?
>>
>> We are going to switch only AC100 and TrimSlice to use the UDC driver.
> 
> Really? I saw patches in the series for Beaver, Dalmore, and Jetson TK1 too.
> 

Yes, the "PHY" and "EHCI" nodes are disabled on those boards in DT.

>> Do you
>> know whether that port is working in a host mode with the tegra-ehci driver on
>> these devices?
> 
> If any USB port is enabled in the DT, it was certainly validated at some point.
> IIRC, we only have host mode enabled at present. So, yes, I'd expect this port
> to work in host mode currently without any issue.
> 

Okay, so we have to decide whether it's reasonable to switch AC100 and TrimSlice
to the peripheral mode. I think realistically chances that someone uses that
port in a host mode are quite low, while it works fine and probably more useful
in a device mode.

>> That should be a micro USB port. Since that port is working in a
>> device mode by default, I presume that switching it into a host mode would
>> require some extra 'dance', otherwise I may drop the AC100 / TrimSlice patches.
>>
>> The full-featured OTG should be possible, it could be done later if desired. I'm
>> leaving it to somebody else to implement.


-- 
Dmitry
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