On 26 April 2017 at 10:06, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > Hi Ulf, > > On Tue, Apr 25, 2017 at 9:34 PM, Ulf Hansson <ulf.hansson@xxxxxxxxxx> wrote: >> However, we currently know about at least two different SoCs that need >> this. Perhaps we can extend the below list to justify adding a new >> framework/APIs. Something along the lines what you propose in $subject >> patchset. >> >> 1) Nvidia; to solve the USB super-speed host/device problem. >> 2) QCOM, which has pointed to several cases where the PM topology is >> laid out like devices having two PM domains.. >> 3?) I don't fully remember - but I think Geert also pointed to some >> examples where a device could reside in a clock domain but also in >> power domain for a Renesas SoC!? >> 4) ? > > Most Renesas SoCs have module clocks, which we model as a clock domain. > Some Renesas SoCs have power domains for CPUs, others have them for > devices as well. > As we always provide a virtual "always-on" power domain in the power domain > controller, all devices can refer to it using "power-domains" properties, > and the driver for the power domain controller can just forward the clock > domain operations to the clock driver. Okay, thanks for clarifying this. Thinking about this as bit more, when I realized that *if* we would add a new PM domain framework for explicit control of PM domains, that would mean you need to deploy support for that in the drivers. On the other hand, as you anyway would need to change the drivers, you could instead deploy clock support in the drivers, which would avoid using the clock domain. In that way, you could still stay with one PM domain pointer per device, used to control the power domains instead. Right? Or would that have other implications? Kind regards Uffe -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
