The TK1 SOM from Colorado Engineering is a small form-factor board
similar to the Jetson TK1.
Signed-off-by: Peter Chubb <peter.chubb@xxxxxxxxxxxxxxx>
---
configs/cei-tk1-som.board | 202 ++++++++++++++++++++++++++++++++++++++++++++++
csv-to-board.py | 8 ++
2 files changed, 210 insertions(+)
create mode 100644 configs/cei-tk1-som.board
diff --git a/configs/cei-tk1-som.board b/configs/cei-tk1-som.board
new file mode 100644
index 0000000..8e0f5e0
--- /dev/null
+++ b/configs/cei-tk1-som.board
@@ -0,0 +1,202 @@
+soc = 'tegra124'
+
+pins = (
+ #pin, mux, gpio_init, pull, tri, e_inp, od, rcv_sel
+ ('dap_mclk1_pw4', 'extperiph1', None, 'none', False, False, False, False),
+ ('dap_mclk1_req_pee2', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap1_din_pn1', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap1_dout_pn2', 'i2s0', None, 'down', True, False, False, False),
+ ('dap1_fs_pn0', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap1_sclk_pn3', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap2_din_pa4', 'i2s1', None, 'none', True, True, False, False),
+ ('dap2_dout_pa5', 'i2s1', None, 'none', False, False, False, False),
+ ('dap2_fs_pa2', 'i2s1', None, 'none', False, False, False, False),
+ ('dap2_sclk_pa3', 'i2s1', None, 'none', False, False, False, False),
+ ('gpio_x4_aud_px4', None, 'in', 'none', True, True, False, False),
+ ('gpio_x5_aud_px5', 'rsvd4', None, 'down', True, False, False, False),
+ ('gpio_x6_aud_px6', 'gmi', None, 'down', True, False, False, False),
+ ('gpio_x7_aud_px7', 'rsvd1', None, 'down', True, False, False, False),
+ ('gpio_w2_aud_pw2', 'rsvd2', None, 'down', True, False, False, False),
+ ('gpio_w3_aud_pw3', 'spi6', None, 'down', True, False, False, False),
+ ('dvfs_pwm_px0', 'cldvfs', None, 'none', False, False, False, False),
+ ('gpio_x1_aud_px1', None, 'in', 'none', True, True, False, False),
+ ('dvfs_clk_px2', 'cldvfs', None, 'none', False, False, False, False),
+ ('gpio_x3_aud_px3', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap3_din_pp1', 'i2s2', None, 'down', True, False, False, False),
+ ('dap3_dout_pp2', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap3_fs_pp0', 'i2s2', None, 'down', True, False, False, False),
+ ('dap3_sclk_pp3', 'rsvd3', None, 'down', True, False, False, False),
+ ('pv0', None, 'in', 'none', True, True, False, False),
+ ('pv1', None, 'in', 'none', True, True, False, False),
+ ('ulpi_clk_py0', 'spi1', None, 'none', False, False, False, False),
+ ('ulpi_data0_po1', None, 'in', 'none', True, True, False, False),
+ ('ulpi_data1_po2', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data2_po3', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data3_po4', None, 'in', 'none', True, True, False, False),
+ ('ulpi_data4_po5', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data5_po6', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data6_po7', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data7_po0', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_dir_py1', 'spi1', None, 'none', True, True, False, False),
+ ('ulpi_nxt_py2', 'spi1', None, 'none', False, False, False, False),
+ ('ulpi_stp_py3', 'spi1', None, 'none', False, False, False, False),
+ ('cam_i2c_scl_pbb1', 'i2c3', None, 'none', False, True, True, False),
+ ('cam_i2c_sda_pbb2', 'i2c3', None, 'none', False, True, True, False),
+ ('cam_mclk_pcc0', 'vi_alt3', None, 'none', False, False, False, False),
+ ('pbb0', 'vimclk2_alt', None, 'none', False, False, False, False),
+ ('pbb3', None, 'out0', 'none', False, False, False, False),
+ ('pbb4', 'vgp4', None, 'down', True, False, False, False),
+ ('pbb5', 'rsvd3', None, 'down', True, False, False, False),
+ ('pbb6', None, 'out0', 'none', False, False, False, False),
+ ('pbb7', None, 'out0', 'none', False, False, False, False),
+ ('pcc1', None, 'in', 'none', False, True, False, False),
+ ('pcc2', None, 'in', 'none', False, True, False, False),
+ ('gen2_i2c_scl_pt5', 'i2c2', None, 'none', False, True, True, False),
+ ('gen2_i2c_sda_pt6', 'i2c2', None, 'none', False, True, True, False),
+ ('pj7', 'uartd', None, 'none', False, False, False, False),
+ ('pb0', 'uartd', None, 'up', True, True, False, False),
+ ('pb1', 'uartd', None, 'up', True, True, False, False),
+ ('pk7', 'uartd', None, 'none', False, False, False, False),
+ ('pg0', None, 'in', 'none', True, True, False, False),
+ ('pg1', None, 'in', 'none', True, True, False, False),
+ ('ph2', 'gmi', None, 'down', True, False, False, False),
+ ('ph3', 'gmi', None, 'down', True, False, False, False),
+ ('ph4', None, 'in', 'none', True, True, False, False),
+ ('ph5', 'rsvd2', None, 'down', True, False, False, False),
+ ('ph6', 'gmi', None, 'down', True, False, False, False),
+ ('ph7', None, 'in', 'none', False, True, False, False),
+ ('pg2', None, 'in', 'none', True, True, False, False),
+ ('pg3', None, 'in', 'none', True, True, False, False),
+ ('pg4', None, 'in', 'none', True, True, False, False),
+ ('pg5', 'spi4', None, 'none', False, False, False, False),
+ ('pg6', 'spi4', None, 'none', False, False, False, False),
+ ('pg7', 'spi4', None, 'none', True, True, False, False),
+ ('ph0', 'gmi', None, 'down', True, False, False, False),
+ ('ph1', 'gmi', None, 'down', True, False, False, False),
+ ('pk0', 'rsvd1', None, 'down', True, False, False, False),
+ ('pk1', 'rsvd4', None, 'down', True, False, False, False),
+ ('pj0', None, 'in', 'none', True, True, False, False),
+ ('pj2', None, 'in', 'none', True, True, False, False),
+ ('pk3', 'gmi', None, 'down', True, False, False, False),
+ ('pk4', 'rsvd2', None, 'down', True, False, False, False),
+ ('pk2', None, 'in', 'none', False, True, False, False),
+ ('pi3', None, 'in', 'none', True, True, False, False),
+ ('pi6', None, 'in', 'none', True, True, False, False),
+ ('pi2', 'rsvd4', None, 'down', True, False, False, False),
+ ('pi5', 'rsvd2', None, 'down', True, False, False, False),
+ ('pi1', None, 'in', 'none', True, True, False, False),
+ ('pi4', 'gmi', None, 'down', True, False, False, False),
+ ('pi7', 'rsvd1', None, 'down', True, False, False, False),
+ ('pc7', 'rsvd1', None, 'down', True, False, False, False),
+ ('pi0', None, 'out0', 'none', False, False, False, False),
+ ('pex_l0_clkreq_n_pdd2', 'pe0', None, 'none', True, True, False, False),
+ ('pex_l0_rst_n_pdd1', 'pe0', None, 'none', False, False, False, False),
+ ('pex_l1_clkreq_n_pdd6', 'pe1', None, 'none', True, True, False, False),
+ ('pex_l1_rst_n_pdd5', 'pe1', None, 'none', False, False, False, False),
+ ('pex_wake_n_pdd3', 'pe', None, 'none', True, True, False, False),
+ ('usb_vbus_en2_pff1', 'rsvd2', None, 'down', True, False, False, False),
+ ('pff2', 'rsvd2', None, 'down', True, False, False, False),
+ ('clk2_out_pw5', 'rsvd2', None, 'down', True, False, False, False),
+ ('clk2_req_pcc5', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc1_wp_n_pv3', 'sdmmc1', None, 'down', True, False, False, False),
+ ('sdmmc1_clk_pz0', 'rsvd3', None, 'down', True, False, False, False),
+ ('sdmmc1_cmd_pz1', 'sdmmc1', None, 'down', True, False, False, False),
+ ('sdmmc1_dat0_py7', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc1_dat1_py6', 'sdmmc1', None, 'down', True, False, False, False),
+ ('sdmmc1_dat2_py5', 'sdmmc1', None, 'down', True, False, False, False),
+ ('sdmmc1_dat3_py4', 'sdmmc1', None, 'down', True, False, False, False),
+ ('sdmmc3_clk_pa6', 'sdmmc3', None, 'none', False, True, False, False),
+ ('sdmmc3_cmd_pa7', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat0_pb7', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat1_pb6', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat2_pb5', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat3_pb4', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_clk_lb_out_pee4', 'sdmmc3', None, 'none', False, True, False, False),
+ ('sdmmc3_clk_lb_in_pee5', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc4_clk_pcc4', 'sdmmc4', None, 'none', False, True, False, False),
+ ('sdmmc4_cmd_pt7', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat0_paa0', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat1_paa1', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat2_paa2', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat3_paa3', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat4_paa4', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat5_paa5', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat6_paa6', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat7_paa7', 'sdmmc4', None, 'up', False, True, False, False),
+ ('kb_col0_pq0', None, 'in', 'up', True, True, False, False),
+ ('kb_col1_pq1', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_col2_pq2', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_col3_pq3', None, 'in', 'none', True, True, False, False),
+ ('kb_col4_pq4', 'kbc', None, 'down', True, False, False, False),
+ ('kb_col5_pq5', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_col6_pq6', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_col7_pq7', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row0_pr0', None, 'in', 'none', False, True, False, False),
+ ('kb_row1_pr1', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row10_ps2', None, 'in', 'none', False, True, False, False),
+ ('kb_row11_ps3', None, 'in', 'none', False, True, False, False),
+ ('kb_row12_ps4', None, 'in', 'none', False, True, False, False),
+ ('kb_row13_ps5', None, 'in', 'none', False, True, False, False),
+ ('kb_row14_ps6', None, 'in', 'none', False, True, False, False),
+ ('kb_row15_ps7', None, 'in', 'none', True, True, False, False),
+ ('kb_row16_pt0', None, 'in', 'none', False, True, False, False),
+ ('kb_row17_pt1', None, 'in', 'none', True, True, False, False),
+ ('kb_row2_pr2', None, 'out0', 'none', False, False, False, False),
+ ('kb_row3_pr3', 'kbc', None, 'down', True, False, False, False),
+ ('kb_row4_pr4', None, 'in', 'none', True, True, False, False),
+ ('kb_row5_pr5', 'rsvd3', None, 'down', True, False, False, False),
+ ('kb_row6_pr6', None, 'in', 'none', False, True, False, False),
+ ('kb_row7_pr7', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row8_ps0', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row9_ps1', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc3_cd_n_pv2', 'rsvd3', None, 'down', True, False, False, False),
+ ('clk_32k_out_pa0', 'soc', None, 'up', True, True, False, False),
+ ('pwr_i2c_scl_pz6', 'i2cpwr', None, 'none', False, True, True, False),
+ ('pwr_i2c_sda_pz7', 'i2cpwr', None, 'none', False, True, True, False),
+ ('jtag_rtck', 'rtck', None, 'up', False, False, False, False),
+ ('clk_32k_in', 'clk', None, 'none', True, True, False, False),
+ ('core_pwr_req', 'pwron', None, 'none', False, False, False, False),
+ ('cpu_pwr_req', 'cpu', None, 'none', False, False, False, False),
+ ('pwr_int_n', 'pmi', None, 'up', True, True, False, False),
+ ('reset_out_n', 'reset_out_n', None, 'none', False, True, False, False),
+ ('clk3_out_pee0', 'rsvd2', None, 'down', True, False, False, False),
+ ('clk3_req_pee1', 'rsvd2', None, 'down', True, False, False, False),
+ ('dap4_din_pp5', 'rsvd3', None, 'down', True, False, False, False),
+ ('dap4_dout_pp6', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap4_fs_pp4', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap4_sclk_pp7', 'rsvd3', None, 'down', True, False, False, False),
+ ('gen1_i2c_scl_pc4', 'i2c1', None, 'none', False, True, True, False),
+ ('gen1_i2c_sda_pc5', 'i2c1', None, 'none', False, True, True, False),
+ ('pu0', 'rsvd4', None, 'down', True, False, False, False),
+ ('pu1', 'rsvd1', None, 'down', True, False, False, False),
+ ('pu2', 'rsvd1', None, 'down', True, False, False, False),
+ ('pu3', 'gmi', None, 'down', True, False, False, False),
+ ('pu4', 'gmi', None, 'down', True, False, False, False),
+ ('pu5', 'gmi', None, 'down', True, False, False, False),
+ ('pu6', 'rsvd3', None, 'down', True, False, False, False),
+ ('uart2_cts_n_pj5', 'uartb', None, 'up', True, True, False, False),
+ ('uart2_rts_n_pj6', 'uartb', None, 'none', False, False, False, False),
+ ('uart2_rxd_pc3', 'irda', None, 'up', True, True, False, False),
+ ('uart2_txd_pc2', 'irda', None, 'none', False, False, False, False),
+ ('uart3_cts_n_pa1', 'gmi', None, 'down', True, False, False, False),
+ ('uart3_rts_n_pc0', 'gmi', None, 'down', True, False, False, False),
+ ('uart3_rxd_pw7', 'rsvd2', None, 'down', True, False, False, False),
+ ('uart3_txd_pw6', 'rsvd2', None, 'down', True, False, False, False),
+ ('hdmi_cec_pee3', 'cec', None, 'none', False, True, False, False),
+ ('hdmi_int_pn7', None, 'in', 'down', True, True, False, False),
+ ('ddc_scl_pv4', 'i2c4', None, 'none', False, True, False, False),
+ ('ddc_sda_pv5', 'i2c4', None, 'none', False, True, False, False),
+ ('spdif_out_pk5', 'rsvd2', None, 'down', True, False, False, False),
+ ('spdif_in_pk6', None, 'out0', 'none', False, False, False, False),
+ ('usb_vbus_en0_pn4', 'usb', None, 'none', False, True, False, False),
+ ('usb_vbus_en1_pn5', 'usb', None, 'none', False, True, False, False),
+ ('dp_hpd_pff0', 'rsvd2', None, 'down', True, False, False, False),
+)
+
+drive_groups = (
+)
+
+mipi_pad_ctrl_groups = (
+ #pin, mux
+ ('dsi_b', 'dsi_b'),
+)
diff --git a/csv-to-board.py b/csv-to-board.py
index 2de66c5..ff0fcba 100755
--- a/csv-to-board.py
+++ b/csv-to-board.py
@@ -44,7 +44,15 @@ if args.debug:
dbg = True
if dbg: print(args)
+# Boards in alphabetical order in this dictionary:
supported_boards = {
+ 'cei-tk1-som': {
+ # tk1-som_pinmux_V2.4.xlsm Colorado TK1-SOM Configuration (1-based rsvd)
+ # updated to version 11 by Peter Chubb
+ 'filename': 'csv/cei-tk1-som.csv',
+ 'rsvd_base': 1,
+ 'soc': 'tegra124',
+ },
'e2220-1170': {
# T210_customer_pinmux.xlsm worksheet [elided] (0-based rsvd)
'filename': 'csv/e2220-1170.csv',
--
2.9.3
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