Re: [PATCH 1/3] clk: tegra: Disable spread spectrum on pll_d2

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On Tue, Jun 14, 2016 at 02:00:42PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@xxxxxxxxxx>
> 
> Enabling spread spectrum on pll_d2 can lead to issues with display
> modes. HDMI monitors, for example, would report "Signal Error" and
> some modes driven over DisplayPort would generate fuzzy horizontal
> bands.
> 

Acked-by: Peter De Schrijver <pdeschrijver@xxxxxxxxxx>

The only display clock we should enable spread spectrum for, is pll_dp.
AFAIK the DP spec specifies the amount of spread which can be tolerated.

Peter.

> Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
> ---
>  drivers/clk/tegra/clk-tegra210.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
> index 6bd1235d09b1..cd141a364c9d 100644
> --- a/drivers/clk/tegra/clk-tegra210.c
> +++ b/drivers/clk/tegra/clk-tegra210.c
> @@ -1914,8 +1914,9 @@ static struct tegra_clk_pll_params pll_d2_params = {
>  	.sdm_din_mask = PLLA_SDM_DIN_MASK,
>  	.sdm_ctrl_reg = PLLD2_MISC1,
>  	.sdm_ctrl_en_mask = PLLD2_SDM_EN_MASK,
> -	.ssc_ctrl_reg = PLLD2_MISC1,
> -	.ssc_ctrl_en_mask = PLLD2_SSC_EN_MASK,
> +	/* disable spread-spectrum for pll_d2 */
> +	.ssc_ctrl_reg = 0,
> +	.ssc_ctrl_en_mask = 0,
>  	.round_p_to_pdiv = pll_qlin_p_to_pdiv,
>  	.pdiv_tohw = pll_qlin_pdiv_to_hw,
>  	.div_nmp = &pllss_nmp,
> -- 
> 2.8.3
> 
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