On 06/06/16 12:53, Jon Hunter wrote:
> To support GICs that require runtime power management, it is necessary
> to add a platform driver, so that the probing of the chip can be
> deferred if resources, such as a power-domain, is not yet available.
>
> To prepare for adding a platform driver:
> 1. Drop the __init section from the gic_dist_config() so this can be
> re-used by the platform driver.
> 2. Add prototypes for functions required by the platform driver to the
> GIC header file so they can be re-used.
>
> Signed-off-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> ---
> drivers/irqchip/irq-gic-common.c | 4 ++--
> drivers/irqchip/irq-gic.c | 15 ++++++++-------
> include/linux/irqchip/arm-gic.h | 5 +++++
> 3 files changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c
> index 89e7423f0ebb..9ae71804b5dd 100644
> --- a/drivers/irqchip/irq-gic-common.c
> +++ b/drivers/irqchip/irq-gic-common.c
> @@ -90,8 +90,8 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
> return ret;
> }
>
> -void __init gic_dist_config(void __iomem *base, int gic_irqs,
> - void (*sync_access)(void))
> +void gic_dist_config(void __iomem *base, int gic_irqs,
> + void (*sync_access)(void))
> {
> unsigned int i;
>
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index 94eab6e23124..3d3ab9045244 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -449,7 +449,7 @@ static void gic_cpu_if_up(struct gic_chip_data *gic)
> }
>
>
> -static void __init gic_dist_init(struct gic_chip_data *gic)
> +static void gic_dist_init(struct gic_chip_data *gic)
> {
> unsigned int i;
> u32 cpumask;
> @@ -535,7 +535,7 @@ int gic_cpu_if_down(unsigned int gic_nr)
> * this function, no interrupts will be delivered by the GIC, and another
> * platform-specific wakeup source must be enabled.
> */
> -static void gic_dist_save(struct gic_chip_data *gic)
> +void gic_dist_save(struct gic_chip_data *gic)
> {
> unsigned int gic_irqs;
> void __iomem *dist_base;
> @@ -574,7 +574,7 @@ static void gic_dist_save(struct gic_chip_data *gic)
> * handled normally, but any edge interrupts that occured will not be seen by
> * the GIC and need to be handled by the platform-specific wakeup source.
> */
> -static void gic_dist_restore(struct gic_chip_data *gic)
> +void gic_dist_restore(struct gic_chip_data *gic)
> {
> unsigned int gic_irqs;
> unsigned int i;
> @@ -620,7 +620,7 @@ static void gic_dist_restore(struct gic_chip_data *gic)
> writel_relaxed(GICD_ENABLE, dist_base + GIC_DIST_CTRL);
> }
>
> -static void gic_cpu_save(struct gic_chip_data *gic)
> +void gic_cpu_save(struct gic_chip_data *gic)
> {
> int i;
> u32 *ptr;
> @@ -650,7 +650,7 @@ static void gic_cpu_save(struct gic_chip_data *gic)
>
> }
>
> -static void gic_cpu_restore(struct gic_chip_data *gic)
> +void gic_cpu_restore(struct gic_chip_data *gic)
> {
> int i;
> u32 *ptr;
> @@ -727,7 +727,7 @@ static struct notifier_block gic_notifier_block = {
> .notifier_call = gic_notifier,
> };
>
> -static int __init gic_pm_init(struct gic_chip_data *gic)
> +static int gic_pm_init(struct gic_chip_data *gic)
> {
> gic->saved_ppi_enable = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4,
> sizeof(u32));
> @@ -757,7 +757,7 @@ free_ppi_enable:
> return -ENOMEM;
> }
> #else
> -static int __init gic_pm_init(struct gic_chip_data *gic)
> +static int gic_pm_init(struct gic_chip_data *gic)
> {
> return 0;
> }
> @@ -1179,6 +1179,7 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
> set_smp_cross_call(gic_raise_softirq);
> register_cpu_notifier(&gic_cpu_notifier);
> #endif
> +
Not sure where this extra line came from but shouldn't be here.
Marc let me know if you want me to resend.
Jon
--
nvpublic
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