On 15/04/16 17:41, Laxman Dewangan wrote: > > On Friday 15 April 2016 09:15 PM, Jon Hunter wrote: >> On 15/04/16 16:14, Laxman Dewangan wrote: >>> >>> I used pins as this is the property from pincon generic so that I can >>> use the generic implementation. >>> >>> Here, I will not go to the pin level control as HW does not support pin >>> level control. >>> >>> I will say the unit should be interface level. Should we say >>> IO_GROUP_CSIA, IO_GROUP_CSIB etc? >> So we need to reflect the hardware in device-tree and although yes the >> power-down for the CSI_x_xxx pads are all controlled together as a >> single group, it does not feel right that we add a pseudo pin called >> csix to represent these. >> >> The CSI_x_xxx pads are already in device-tree and so why not add a >> property to each of these pads which has the IO rail information for >> power-down and voltage-select? > > Which dt binding docs have these? > I looked for nvidia,tegra210-pinmux.txt and not able to find csi_xxx. For CSI you are right they are not included by the current DT binding docs, however, the sdmmc1/3 pads are. So that makes things a bit more messy as some are and some are not. > Here I dont want to refer the individual pins as control should be as > group. I understand, however, at least for power-down control I don't see why we cannot refer to the individual pins and once all are inactive then the rail can be powered down. For switching the voltage it is a bit more complex, but may be we could still look-up the IO rail based upon the pads the device uses. Cheers Jon -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
