On 02/05/2016 04:37 PM, Linus Walleij wrote: > On Thu, Jan 21, 2016 at 8:51 PM, Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote: > >> So as long as an interrupt handler is installed, there is no sane way that we >> can decide to power down the irq chip, unless that chip has the magic ability >> to relay incoming interrupts while powered down :) > > Actually isn't that exactly what almost every SoC that supports > deepsleep does? > > They power off the primary interrupt controller and arm the padring > of the SoC with an asynchronous edge detector to wake up as soon > as something happens on a few select lines, like a keypad button > or whatnot. > > The asynchronous edge detector is handled by the ROM or some > power-management microcontroller, which wakes up the system > and restores power to the CPU and primary interrupt controller. > That is the magic ability right there. > > Of course as the wakeup signal may be deasserted at the > point the system actually comes back up, so the magic ROM > power management unit then needs to latch > any latent IRQs from some shadow register to the primary interrupt > controller, which as far as I've seen is done by out-of-tree hacks > similar to the irq_[get/set]_irqchip_state() implemented > by Marc Zyngier, albeit for virtualization. > > I've not seen it on any non-primary interrupt controller though. > OMAP gpio can lose context(Power) even if there GPIO IRQs configured as wakeup sources (wakeup happen through the SoC specific HW responsible for wakeup in this case) - pcs. It also injects IRQs if their triggering type is not fully compatible with PM HW. -- regards, -grygorii -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
