On Mon, Jul 20, 2015 at 02:39:36AM -0500, Steev Klimaszewski wrote:
> On Mon, Jul 20, 2015 at 1:49 AM, Thierry Reding <thierry.reding@xxxxxxxxx>
> wrote:
>
> > From: Thierry Reding <treding@xxxxxxxxxx>
> >
> > The DPAUX read/write FIFO registers aren't sequential in the register
> > space, causing transfers larger than 4 bytes to cause accesses to non-
> > existing FIFO registers.
> >
> > Fixes: 6b6b604215c6 ("drm/tegra: Add eDP support")
> > Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
> > ---
> > drivers/gpu/drm/tegra/dpaux.c | 18 ++++++++----------
> > 1 file changed, 8 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c
> > index d6b55e3e3716..a43a836e6f88 100644
> > --- a/drivers/gpu/drm/tegra/dpaux.c
> > +++ b/drivers/gpu/drm/tegra/dpaux.c
> > @@ -72,34 +72,32 @@ static inline void tegra_dpaux_writel(struct
> > tegra_dpaux *dpaux,
> > static void tegra_dpaux_write_fifo(struct tegra_dpaux *dpaux, const u8
> > *buffer,
> > size_t size)
> > {
> > - unsigned long offset = DPAUX_DP_AUXDATA_WRITE(0);
> > size_t i, j;
> >
> > - for (i = 0; i < size; i += 4) {
> > - size_t num = min_t(size_t, size - i, 4);
> > + for (i = 0; i < DIV_ROUND_UP(size, 4); i++) {
> > + size_t num = min_t(size_t, size - i * 4, 4);
> > unsigned long value = 0;
> >
> > for (j = 0; j < num; j++)
> > - value |= buffer[i + j] << (j * 8);
> > + value |= buffer[i * 4 + j] << (j * 8);
> >
> > - tegra_dpaux_writel(dpaux, value, offset++);
> > + tegra_dpaux_writel(dpaux, value,
> > DPAUX_DP_AUXDATA_WRITE(i));
> > }
> > }
> >
> > static void tegra_dpaux_read_fifo(struct tegra_dpaux *dpaux, u8 *buffer,
> > size_t size)
> > {
> > - unsigned long offset = DPAUX_DP_AUXDATA_READ(0);
> > size_t i, j;
> >
> > - for (i = 0; i < size; i += 4) {
> > - size_t num = min_t(size_t, size - i, 4);
> > + for (i = 0; i < DIV_ROUND_UP(size, 4); i++) {
> > + size_t num = min_t(size_t, size - i * 4, 4);
> > unsigned long value;
> >
> > - value = tegra_dpaux_readl(dpaux, offset++);
> > + value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXDATA_READ(i));
> >
> > for (j = 0; j < num; j++)
> > - buffer[i + j] = value >> (j * 8);
> > + buffer[i * 4 + j] = value >> (j * 8);
> > }
> > }
> >
> > --
> > 2.4.5
> >
> >
>
> This fixes the issue that I reported earlier, so feel free to add my
>
> Tested-by: Steev Klimaszewski <steev@xxxxxxxxxx>
Great, thanks.
Thierry
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