Re: [PATCH v4 02/20] clk: tegra: periph: add new periph clks and muxes for Tegra210

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Wed, May 06, 2015 at 07:20:32PM +0800, Jim Lin wrote:
> On 05/05/2015 12:37 AM, Rhyland Klein wrote:
[...]
> >diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
[...]
> >@@ -333,6 +497,11 @@ static u32 mux_clkm_48M_pllp_480M_idx[] = {
> >  	[0] = 0, [1] = 2, [2] = 4, [3] = 6,
> >  };
> >+static const char *mux_clkm_pllre_clk32_480M[] = {
> >+	"clk_m", "pll_re_out", "clk_32k", "pll_u_480M"
> >+};
> >+#define mux_clkm_pllre_clk32_480M_idx NULL
> Please help to replace above
> 
> #define mux_clkm_pllre_clk32_480M_idx NULL
> 
> with
> 
> static u32 mux_clkm_pllre_clk32_480M_idx[] = {
> 
>        [0] = 0, [1] = 1, [2] = 2, [3] = 3,
> };

Isn't that the default already if you specify NULL as index table?

Thierry

Attachment: pgpNptpWYmTTe.pgp
Description: PGP signature


[Index of Archives]     [ARM Kernel]     [Linux ARM]     [Linux ARM MSM]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux