Fix D-PHY HS Trail setting on Tegra.
It is found that HS Trail is off -12% during compliance testing
Signed-off-by: David Ung <davidu@xxxxxxxxxx>
---
drivers/gpu/drm/tegra/dsi.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index f787445..34fb82d 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -335,6 +335,12 @@ static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)
if (err < 0)
return err;
+ /*
+ * Tegra DSI progamming guide requires additional adjustments
+ * to HS trail for compliance.
+ */
+ timing->hstrail += 3 * period * 8;
+
err = mipi_dphy_timing_validate(&timing, period);
if (err < 0) {
dev_err(dsi->dev, "failed to validate D-PHY timing: %d\n", err);
--
1.8.1.5
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