On 18 November 2014 at 04:11, Andrew Bresticker <abrestic@xxxxxxxxxxxx> wrote: > In addition to the PCIe and SATA PHYs, the XUSB pad controller also > supports 3 UTMI, 2 HSIC, and 2 USB3 PHYs. Each USB3 PHY uses a single > PCIe or SATA lane and is mapped to one of the three UTMI ports. > > The xHCI controller will also send messages intended for the PHY driver, > so request and listen for messages on the mailbox's PHY channel. > > Signed-off-by: Andrew Bresticker <abrestic@xxxxxxxxxxxx> > Acked-by: Linus Walleij <linus.walleij@xxxxxxxxxx> > Reviewed-by: Stephen Warren <swarren@xxxxxxxxxx> Mailbox bits look good to me. -Jassi -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html