On Wed, Jul 16, 2014 at 04:47:38PM +0200, Hans de Goede wrote: > Hi, > > On 07/16/2014 03:13 PM, Thierry Reding wrote: > > On Wed, Jul 16, 2014 at 01:49:57PM +0200, Hans de Goede wrote: > >> Hi, > >> > >> On 07/16/2014 01:40 PM, Mikko Perttunen wrote: > >>> This patch adds device tree binding documentation for the SATA > >>> controller found on NVIDIA Tegra SoCs. > >>> > >>> Signed-off-by: Mikko Perttunen <mperttunen@xxxxxxxxxx> > >>> --- > >>> v4: clarify mandatory clock order > >> > >> Thanks this and the new v4 of "ata: Add support for the Tegra124 SATA controller" > >> both look good to me. So these 2 + v3 for the rest of the series are: > >> > >> Acked-by: Hans de Goede <hdegoede@xxxxxxxxxx> > > > > Like I said in my reply to PATCH v3 7/8, I think this mandatory clock > > order is a mistake. > > We've plenty of other dt bindings where things need to be specified in > a certain order, e.g. registers. So I don't really see what the problem > is here. Like I said, the clock-names exists so that drivers can request a clock by name. Therefore the order in which they are listed doesn't matter. The only thing that matters is that the entries in clocks and clock-names match up. With the libahci_platform code we completely annul that convention. Thierry
Attachment:
pgpo2iwsjXJyV.pgp
Description: PGP signature