Re: [RFC 04/10] memory: Add Tegra124 memory controller support

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Hi Thierry,

On 06/27/2014 04:49 AM, Thierry Reding wrote:
[snip]
+
+#define MC_INTSTATUS 0x000
+#define  MC_INT_DECERR_MTS (1 << 16)
+#define  MC_INT_SECERR_SEC (1 << 13)
+#define  MC_INT_DECERR_VPR (1 << 12)
+#define  MC_INT_INVALID_APB_ASID_UPDATE (1 << 11)
+#define  MC_INT_INVALID_SMMU_PAGE (1 << 10)
+#define  MC_INT_ARBITRATION_EMEM (1 << 9)
+#define  MC_INT_SECURITY_VIOLATION (1 << 8)
+#define  MC_INT_DECERR_EMEM (1 << 6)
+#define MC_INTMASK 0x004
+#define MC_ERR_STATUS 0x08
+#define MC_ERR_ADR 0x0c
+
[snip]
+
+#define SMMU_PDE_ATTR          (SMMU_PDE_READABLE | SMMU_PDE_WRITABLE | \
+                                SMMU_PDE_NONSECURE)
+#define SMMU_PTE_ATTR          (SMMU_PTE_READABLE | SMMU_PTE_WRITABLE | \
+                                SMMU_PTE_NONSECURE)
+
+#define SMMU_PDE_VACANT(n)     (((n) << 10) | SMMU_PDE_ATTR)
+#define SMMU_PTE_VACANT(n)     (((n) << 12) | SMMU_PTE_ATTR)

There is an ISR to catch the invalid SMMU translation. Do you want to modify the identity mapping with read/write attribute of the unused SMMU pages?

This can make sure we capture the invalid SMMU translation. And helps for driver to capture issues when using SMMU.

-joseph

+static irqreturn_t tegra124_mc_irq(int irq, void *data)
+{
+       struct tegra_mc *mc = data;
+       u32 value, status, mask;
+
+       /* mask all interrupts to avoid flooding */
+       mask = mc_readl(mc, MC_INTMASK);
+       mc_writel(mc, 0, MC_INTMASK);
+
+       status = mc_readl(mc, MC_INTSTATUS);
+       mc_writel(mc, status, MC_INTSTATUS);
+
+       dev_dbg(mc->dev, "INTSTATUS: %08x\n", status);
+
+       if (status & MC_INT_DECERR_MTS)
+               dev_dbg(mc->dev, "  DECERR_MTS\n");
+
+       if (status & MC_INT_SECERR_SEC)
+               dev_dbg(mc->dev, "  SECERR_SEC\n");
+
+       if (status & MC_INT_DECERR_VPR)
+               dev_dbg(mc->dev, "  DECERR_VPR\n");
+
+       if (status & MC_INT_INVALID_APB_ASID_UPDATE)
+               dev_dbg(mc->dev, "  INVALID_APB_ASID_UPDATE\n");
+
+       if (status & MC_INT_INVALID_SMMU_PAGE)
+               dev_dbg(mc->dev, "  INVALID_SMMU_PAGE\n");
+
+       if (status & MC_INT_ARBITRATION_EMEM)
+               dev_dbg(mc->dev, "  ARBITRATION_EMEM\n");
+
+       if (status & MC_INT_SECURITY_VIOLATION)
+               dev_dbg(mc->dev, "  SECURITY_VIOLATION\n");
+
+       if (status & MC_INT_DECERR_EMEM)
+               dev_dbg(mc->dev, "  DECERR_EMEM\n");
+
+       value = mc_readl(mc, MC_ERR_STATUS);
+
+       dev_dbg(mc->dev, "ERR_STATUS: %08x\n", value);
+       dev_dbg(mc->dev, "  type: %x\n", (value >> 28) & 0x7);
+       dev_dbg(mc->dev, "  protection: %x\n", (value >> 25) & 0x7);
+       dev_dbg(mc->dev, "  adr_hi: %x\n", (value >> 20) & 0x3);
+       dev_dbg(mc->dev, "  swap: %x\n", (value >> 18) & 0x1);
+       dev_dbg(mc->dev, "  security: %x\n", (value >> 17) & 0x1);
+       dev_dbg(mc->dev, "  r/w: %x\n", (value >> 16) & 0x1);
+       dev_dbg(mc->dev, "  adr1: %x\n", (value >> 12) & 0x7);
+       dev_dbg(mc->dev, "  client: %x\n", value & 0x7f);
+
+       value = mc_readl(mc, MC_ERR_ADR);
+       dev_dbg(mc->dev, "ERR_ADR: %08x\n", value);
+
+       mc_writel(mc, mask, MC_INTMASK);
+
+       return IRQ_HANDLED;
+}
+
--
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