On Fri, May 23, 2014 at 02:49:40PM +0900, Alexandre Courbot wrote: > On Mon, May 19, 2014 at 5:33 PM, Thierry Reding > <thierry.reding@xxxxxxxxx> wrote: > > On Mon, May 19, 2014 at 04:10:56PM +0900, Alexandre Courbot wrote: > >> From: Lucas Stach <dev@xxxxxxxxxx> > >> > >> On arches with non-coherent PCI, > > > > I guess since this applies to gk20a > > > >> we need to flush caches ourselfes at > > > > "ourselves". Or perhaps even reword to something like: "..., caches need > > to be flushed and invalidated explicitly", since dma_sync_for_cpu() does > > invalidate rather than flush. > > Rephrased as "On arches for which access to GPU memory is non-coherent, caches > need to be flushed and invalidated explicitly at the appropriate places." Nit: s/arches/architectures/ Thierry
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